Daniel Sheridan

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8EEPaul B. Jackson, Daniel Sheridan: A Compact Linear Translation for Bounded Model Checking. Electr. Notes Theor. Comput. Sci. 174(3): 17-30 (2007)
7EEDaniel Sheridan: Bounded Model Checking with SNF, Alternating Automata, and Bu"chi Automata. Electr. Notes Theor. Comput. Sci. 119(2): 83-101 (2005)
6EEAlessandro Cimatti, Marco Roveri, Daniel Sheridan: Bounded Verification of Past LTL. FMCAD 2004: 245-259
5EEDaniel Sheridan: The Optimality of a Fast CNF Conversion and its Use with SAT. SAT 2004
4EEPaul Jackson, Daniel Sheridan: Clause Form Conversions for Boolean Circuits. SAT (Selected Papers 2004: 183-198
3EEDaniel Sheridan: Dynamic Step Size Adjustment in Iterative Deepening Search. CP 2003: 996
2EEAlan M. Frisch, Daniel Sheridan, Toby Walsh: A Fixpoint Based Encoding for Bounded Model Checking. FMCAD 2002: 238-255
1EEDaniel Sheridan: Comparing SAT Encodings for Model Checking. CP 2001: 784

Coauthor Index

1Alessandro Cimatti [6]
2Alan M. Frisch [2]
3Paul Jackson [4]
4Paul B. Jackson [8]
5Marco Roveri [6]
6Toby Walsh [2]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)