| 2008 |
| 8 | EE | Mark Schäfer,
Walter Vogler,
Dominic Wist,
Ralf Wollowski:
Avoiding irreducible CSC conflicts by internal communication.
ACSD 2008: 3-12 |
| 7 | EE | Victor Khomenko,
Mark Schäfer,
Walter Vogler:
Output-Determinacy and Asynchronous Circuit Synthesis.
Fundam. Inform. 88(4): 541-579 (2008) |
| 2007 |
| 6 | EE | Victor Khomenko,
Mark Schäfer,
Walter Vogler:
Output-Determinacy and Asynchronous Circuit Synthesis.
ACSD 2007: 147-156 |
| 5 | EE | Victor Khomenko,
Mark Schäfer:
Combining Decomposition and Unfolding for STG Synthesis.
ICATPN 2007: 223-243 |
| 4 | EE | Mark Schäfer,
Walter Vogler:
Component refinement and CSC-solving for STG decomposition.
Theor. Comput. Sci. 388(1-3): 243-266 (2007) |
| 2006 |
| 3 | EE | Mark Schäfer,
Walter Vogler,
Ralf Wollowski,
Victor Khomenko:
Strategies for Optimised STG Decomposition.
ACSD 2006: 123-132 |
| 2005 |
| 2 | EE | Mark Schäfer,
Walter Vogler:
Component Refinement and CSC Solving for STG Decomposition.
FoSSaCS 2005: 348-363 |
| 1 | EE | Mark Schäfer,
Walter Vogler,
Petr Jancar:
Determinate STG Decomposition of Marked Graphs.
ICATPN 2005: 365-384 |