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| 2002 | ||
|---|---|---|
| 1 | EE | J. A. Lopez, G. Domenech, R. Ruiz, Tom J. Kazmierski: Automated high level synthesis of hardware building blocks present in ART-based neural networks, from VHDL-AMS descriptions. ISCAS (4) 2002: 77-80 |
| 1 | G. Domenech | [1] |
| 2 | Tom J. Kazmierski | [1] |
| 3 | J. A. Lopez | [1] |