R. B. Patil
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2007
1
M. M. Aswale
, R. B. Patil: VHDL Implementation of Multiplierless, High Performance DWT Filter Bank.
World Congress on Engineering 2007
: 708-712
Coauthor
Index
1
M. M. Aswale
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Copyright ©
Sun May 17 03:24:02 2009 by
Michael Ley
(
ley@uni-trier.de
)
