2009 |
12 | EE | A. P. Shanthi,
Ranjani Parthasarathi:
Practical and scalable evolution of digital circuits.
Appl. Soft Comput. 9(2): 618-624 (2009) |
2007 |
11 | EE | T. K. S. Lakshmi Priya,
V. Hari Prasad,
D. Kannan,
L. Karthik Singaram,
G. Madhan,
R. Meenakshi Sundaram,
R. M. Prasad,
Ranjani Parthasarathi:
Evaluating the Network Processor Architecture for Application-Awareness.
COMSWARE 2007 |
10 | EE | V. Vetri Selvi,
Shakir Sharfraz,
Ranjani Parthasarathi:
Mobile Ad Hoc Grid Using Trace Based Mobility Model.
GPC 2007: 274-285 |
9 | EE | T. K. S. Lakshmi Priya,
Ranjani Parthasarathi:
An ASM Model for an Autonomous Network-Infrastructure Grid.
ICNS 2007: 29 |
2005 |
8 | EE | A. P. Shanthi,
L. Karthik Singaram,
Ranjani Parthasarathi:
Evolution of Asynchronous Sequential Circuits.
Evolvable Hardware 2005: 93-96 |
7 | EE | A. P. Shanthi,
Ranjani Parthasarathi:
Genetic learning based fault tolerant models for digital systems.
Appl. Soft Comput. 5(4): 357-371 (2005) |
2004 |
6 | EE | A. P. Shanthi,
P. Muruganandam,
Ranjani Parthasarathi:
Enhancing the Development Based Evolution of Digital Circuits.
Evolvable Hardware 2004: 91- |
5 | EE | R. Sharmila,
M. V. Lakshmi Priya,
Ranjani Parthasarathi:
An Active Framework for a WLAN Access Point Using Intel's IXP1200 Network Processor.
HiPC 2004: 71-80 |
2003 |
4 | EE | Mohan G. Kabadi,
Ranjani Parthasarathi:
Live-Cache: Exploiting Data Redundancy to Reduce Leakage Energy in a Cache Subsystem.
Asia-Pacific Computer Systems Architecture Conference 2003: 337-351 |
3 | | A. P. Shanthi,
Balaji Vijayan,
Manivel Rajendran,
Senthilkumar Veluswami,
Ranjani Parthasarathi:
JBits Based Fault Tolerant Framework for Evolvable Hardware.
Engineering of Reconfigurable Systems and Algorithms 2003: 111-117 |
2 | EE | A. P. Shanthi,
Ranjani Parthasarathi:
Exploring FPGA Structures for Evolving Fault Tolerant Hardware.
Evolvable Hardware 2003: 184-191 |
2002 |
1 | EE | Mohan G. Kabadi,
Natarajan Kannan,
Palanidaran Chidambaram,
Suriya Narayanan,
M. Subramanian,
Ranjani Parthasarathi:
Dead-Block Elimination in Cache: A Mechanism to Reduce I-cache Power Consumption in High Performance Microprocessors.
HiPC 2002: 79-88 |