Hong-June Park

List of publications from the DBLP Bibliography Server - FAQ

2007

3 EE Young-Chan Jang, Jun-Hyun Bae, Sang-Hune Park, Jae-Yoon Sim, Hong-June Park: An 8.8-GS/s 6-bit CMOS Time-Interleaved Flash Analog-to-Digital Converter with Multi-Phase Clock Generator. IEICE Transactions 90-C(6): 1156-1164 (2007)

2005

2 EE Jang-Jin Nam, Hong-June Park: An All-Digital CMOS Duty Cycle Correction Circuit with a Duty-Cycle Correction Range of 15-to-85% for Multi-Phase Applications. IEICE Transactions 88-C(4): 773-777 (2005)

1985

1 EE Hong-June Park, Choong-Ki Kim: An Empirical Model for the Threshold Voltage of Enhancement NMOSFET's. IEEE Trans. on CAD of Integrated Circuits and Systems 4(4): 629-635 (1985)

2007
3	EE	Young-Chan Jang, Jun-Hyun Bae, Sang-Hune Park, Jae-Yoon Sim, Hong-June Park: An 8.8-GS/s 6-bit CMOS Time-Interleaved Flash Analog-to-Digital Converter with Multi-Phase Clock Generator. IEICE Transactions 90-C(6): 1156-1164 (2007)
2005
2	EE	Jang-Jin Nam, Hong-June Park: An All-Digital CMOS Duty Cycle Correction Circuit with a Duty-Cycle Correction Range of 15-to-85% for Multi-Phase Applications. IEICE Transactions 88-C(4): 773-777 (2005)
1985
1	EE	Hong-June Park, Choong-Ki Kim: An Empirical Model for the Threshold Voltage of Enhancement NMOSFET's. IEEE Trans. on CAD of Integrated Circuits and Systems 4(4): 629-635 (1985)

Coauthor Index