| |
| 1992 | ||
|---|---|---|
| 1 | Hiroaki Hirata, Kozo Kimura, Satoshi Nagamine, Yoshiyuki Mochizuki, Akio Nishimura, Yoshimori Nakase, Teiji Nishizawa: An Elementary Processor Architecture with Simultaneous Instruction Issuing from Multiple Threads. ISCA 1992: 136-145 | |
| 1 | Hiroaki Hirata | [1] |
| 2 | Kozo Kimura | [1] |
| 3 | Yoshiyuki Mochizuki | [1] |
| 4 | Satoshi Nagamine | [1] |
| 5 | Yoshimori Nakase | [1] |
| 6 | Teiji Nishizawa | [1] |