Kazuhisa Miyamoto
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2000
1
EE
Jun Kikuchi
,
Tetsuo Sasaki
,
Tohru Hashimoto
, Kazuhisa Miyamoto: Delay-optimal wiring plan for the microprocessor of high performance computing machines.
ASP-DAC 2000
: 265-270
Coauthor
Index
1
Tohru Hashimoto
[
1
]
2
Jun Kikuchi
[
1
]
3
Tetsuo Sasaki
[
1
]
Copyright ©
Sun May 17 03:24:02 2009 by
Michael Ley
(
ley@uni-trier.de
)
