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Juan A. Michell

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2006
4EEGustavo A. Ruiz, Juan A. Michell, Angel M. Buron: High Throughput Parallel-Pipeline 2-D DCT/IDCT Processor Chip. VLSI Signal Processing 45(3): 161-175 (2006)
2005
3EEGustavo A. Ruiz, Juan A. Michell, Angel M. Buron: High throughput 2D DCT/IDCT processor for video coding. ICIP (3) 2005: 1036-1039
2EEGustavo A. Ruiz, Juan A. Michell, Angel M. Buron: Parallel-pipeline 8×8 forward 2-D ICT processor chip for image coding. IEEE Transactions on Signal Processing 53(2-1): 714-723 (2005)
2003
1 Juan A. Michell, Gustavo A. Ruiz, Angel M. Buron: Parallel-pipelined architecture for 2-D ICT VLSI implementation. ICIP (3) 2003: 89-92

Coauthor Index

1Angel M. Buron [1] [2] [3] [4]
2Gustavo A. Ruiz [1] [2] [3] [4]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)