R. Mason
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1999
1
EE
A. Dinh
, R. Mason,
J. Toth
: High speed V.32 trellis encoder/decoder implementation using FPGA.
ISCAS (4) 1999
: 295-298
Coauthor
Index
1
A. Dinh
[
1
]
2
J. Toth
[
1
]
Copyright ©
Sun May 17 03:24:02 2009 by
Michael Ley
(
ley@uni-trier.de
)
