| |
| 1984 | ||
|---|---|---|
| 1 | EE | Thomas A. Johnson, Ronald W. Knepper, Victor Marcello, Wen Wang: Chip Substrate Resistance Modeling Technique for Integrated Circuit Design. IEEE Trans. on CAD of Integrated Circuits and Systems 3(2): 126-134 (1984) |
| 1 | Thomas A. Johnson | [1] |
| 2 | Ronald W. Knepper | [1] |
| 3 | Wen Wang | [1] |