Jeng-Jong J. Lue

List of publications from the DBLP Bibliography Server - FAQ

1999

1 EE Jeng-Jong J. Lue, Dhananjay S. Phatak: Area x Delay (A T) Efficient Multiplier Based on an Intermediate Hybrid Signed-Digit (HSD-1) Representation. IEEE Symposium on Computer Arithmetic 1999: 216-224

1999
1	EE	Jeng-Jong J. Lue, Dhananjay S. Phatak: Area x Delay (A T) Efficient Multiplier Based on an Intermediate Hybrid Signed-Digit (HSD-1) Representation. IEEE Symposium on Computer Arithmetic 1999: 216-224

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