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Myeong S. Lee

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1999
2 Zbigniew Kalbarczyk, Janak H. Patel, Myeong S. Lee, Ravishankar K. Iyer: An Approach to Evaluating the Effects of Realistic Faults in Digital Circuits. VLSI Design 1999: 260-265
1EEZbigniew Kalbarczyk, Ravishankar K. Iyer, Gregory L. Ries, Jaqdish U. Patel, Myeong S. Lee, Yuxiao Xiao: Hierarchical Simulation Approach to Accurate Fault Modeling for System Dependability Evaluation. IEEE Trans. Software Eng. 25(5): 619-632 (1999)

Coauthor Index

1Ravishankar K. Iyer (Ravi K. Iyer) [1] [2]
2Zbigniew Kalbarczyk [1] [2]
3Janak H. Patel [2]
4Jaqdish U. Patel [1]
5Gregory L. Ries [1]
6Yuxiao Xiao [1]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)