Takenori Kouda

List of publications from the DBLP Bibliography Server - FAQ

1999

2 EE Takenori Kouda, Yahiko Kambayashi: FPGA circuit optimization using block integration based on multiple output capability. Systems and Computers in Japan 30(11): 12-21 (1999)

1998

1 EE Takenori Kouda, Yahiko Kambayashi: FPGA Circuit Optimization Based on Block Integration (Abstract). FPGA 1998: 257

1999
2	EE	Takenori Kouda, Yahiko Kambayashi: FPGA circuit optimization using block integration based on multiple output capability. Systems and Computers in Japan 30(11): 12-21 (1999)
1998
1	EE	Takenori Kouda, Yahiko Kambayashi: FPGA Circuit Optimization Based on Block Integration (Abstract). FPGA 1998: 257

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