| |
| 1999 | ||
|---|---|---|
| 4 | Shigeru Nakahara, Keiichi Higeta, Masaki Kohno, Toshiaki Kawamura, Keizo Kakitani: Built-in self-test for GHz embedded SRAMs using flexible pattern generator and new repair algorithm. ITC 1999: 301-310 | |
| 1988 | ||
| 3 | Takashi Nanya, Toshiaki Kawamura: Error/Secure/Propagating Concept and its Application to the Design of Strongly Fault-Secure Processors. IEEE Trans. Computers 37(1): 14-24 (1988) | |
| 1987 | ||
| 2 | Takashi Nanya, Toshiaki Kawamura: On Error Indication for Totally Self-Checking Systems. IEEE Trans. Computers 36(11): 1389-1392 (1987) | |
| 1 | Takashi Nanya, Toshiaki Kawamura: A Note on Strongly Fault-Secure Sequential Circuits. IEEE Trans. Computers 36(9): 1121-1123 (1987) | |
| 1 | Keiichi Higeta | [4] |
| 2 | Keizo Kakitani | [4] |
| 3 | Masaki Kohno | [4] |
| 4 | Shigeru Nakahara | [4] |
| 5 | Takashi Nanya | [1] [2] [3] |