| |
| 1997 | ||
|---|---|---|
| 2 | Wesley K. Kaplow, Boleslaw K. Szymanski: Compile-Time Cache Performance Prediction and its Application to Tiling. Parallel Processing Letters 7(4): 393-407 (1997) | |
| 1995 | ||
| 1 | EE | Wesley K. Kaplow, William Maniatty, Boleslaw K. Szymanski: Impact of memory hierarchy on program partitioning and scheduling. HICSS (2) 1995: 93-102 |
| 1 | William Maniatty | [1] |
| 2 | Boleslaw K. Szymanski | [1] [2] |