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| 1999 | ||
|---|---|---|
| 2 | Rahul Razdan, Apurva Kalia, Manu Lauria: Verification of Systems-on-Chip Designs. VLSI Design 1999: 609 | |
| 1990 | ||
| 1 | EE | Ashok K. Goel, Apurva Kalia: Simulation of ram-based asynchronous sequential circuits. Annual Simulation Symposium 1990: 123-126 |
| 1 | Ashok K. Goel | [1] |
| 2 | Manu Lauria | [2] |
| 3 | Rahul Razdan | [2] |