![]() | ![]() |
2004 | ||
---|---|---|
6 | EE | Tetsuro Kakeshita, Kohei Arai, Mika Ohtsuki: A Personal Data Control Mechanism for Digital Society. AINA (2) 2004: 524-527 |
2000 | ||
5 | EE | Tetsuro Kakeshita, Shenglin Zhang: The Net Disk Architecture for Dynamic Load Balancing among Disk Arrays. ICPADS 2000: 315-322 |
1999 | ||
4 | EE | Tetsuro Kakeshita, Miyuki Murata: Specification-Based Component Retrieval by Means of Examples. DANTE 1999: 411- |
1996 | ||
3 | Tetsuro Kakeshita, Susumu Kubo: A Transaction Processing Architecture for Effective Load Balancing Utilizing High Speed Bus. CODAS 1996: 376-379 | |
1992 | ||
2 | Haiyan Xu, Tetsuro Kakeshita: A Toolkit Approach for Concurrency Control in Design Database Systems Utilizing Design Status. Future Databases 1992: 148-157 | |
1 | Tetsuro Kakeshita, Haiyan Xu: Transaction Sequencing Problems for Maximal Parallelism. RIDE-TQP 1992: 215-216 |
1 | Kohei Arai | [6] |
2 | Susumu Kubo | [3] |
3 | Miyuki Murata | [4] |
4 | Mika Ohtsuki | [6] |
5 | Haiyan Xu | [1] [2] |
6 | Shenglin Zhang | [5] |