Yu Junjun
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2006
1
EE
Wang Pengjun
, Yu Junjun,
Xu Jian
: Design of Clocked Transmission Gate Adiabatic Logic Circuit Based on the 3ECEAC.
APCCAS 2006
: 430-433
Coauthor
Index
1
Xu Jian
[
1
]
2
Wang Pengjun
[
1
]
Copyright ©
Sun May 17 03:24:02 2009 by
Michael Ley
(
ley@uni-trier.de
)
