S. Jana
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2002
1
EE
R. Tessier
, S. Jana: Incremental compilation for parallel logic verification systems.
IEEE Trans. VLSI Syst. 10
(5): 623-636 (2002)
Coauthor
Index
1
R. Tessier
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Copyright ©
Sun May 17 03:24:02 2009 by
Michael Ley
(
ley@uni-trier.de
)
