Cheng-Liang Hung

2008
2	EE	Kuo-Hsing Cheng, Cheng-Liang Hung, Chih-Hsien Chang, Yu-lung Lo, Wei-Bin Yang, Jiunn-Way Miaw: A Spread-Spectrum Clock Generator Using Fractional PLL Controlled Delta-Sigma Modulator for Serial-ATA III. DDECS 2008: 64-67
2007
1	EE	Kuo-Hsing Cheng, Cheng-Liang Hung, Chia-Wei Su: A Sub-1V Low-Power High-Speed Static Frequency Divider. ISCAS 2007: 3848-3851

Coauthor Index

1	Chih-Hsien Chang	[2]
2	Kuo-Hsing Cheng	[1] [2]
3	Yu-lung Lo	[2]
4	Jiunn-Way Miaw	[2]
5	Chia-Wei Su	[1]
6	Wei-Bin Yang	[2]