1999 | ||
---|---|---|
2 | EE | T. A. García, Antonio J. Acosta, J. M. Mora, J. Ramos, José Luis Huertas: Self-Timed Boundary-Scan Cells for Multi-Chip Module Test. J. Electronic Testing 15(1-2): 115-127 (1999) |
1998 | ||
1 | EE | T. A. García, Antonio J. Acosta, José L. Huertas, J. M. Mora, J. Ramos: Self-Timed Boundary-Scan Cells for Multi-Chip Module Test. VTS 1998: 92-97 |
1 | Antonio J. Acosta | [1] [2] |
2 | José Luis Huertas (José L. Huertas) | [1] [2] |
3 | J. M. Mora | [1] [2] |
4 | J. Ramos | [1] [2] |