1997 | ||
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1 | EE | Douglas N. Estremadoyro, Phillip A. Farrington, Bernard J. Schroer, James J. Swain: Simulation of Memory Chip Line Using an Electronics Manufacturing Simulator. Winter Simulation Conference 1997: 1330-1337 |
1 | Phillip A. Farrington | [1] |
2 | Bernard J. Schroer | [1] |
3 | James J. Swain | [1] |