| 2007 |
|---|
| 10 | EE | Ali Y. Duale,
Mark H. Decker,
Hans-Georg Zipperer,
Merav Aharoni,
Theodore J. Bohizic:
Decimal floating-point in z9: An implementation and testing perspective.
IBM Journal of Research and Development 51(1/2): 217-228 (2007) |
| 2006 |
|---|
| 9 | | M. Ümit Uyar,
Ali Y. Duale,
Mariusz A. Fecko:
Testing of Communicating Systems, 18th IFIP TC6/WG6.1 International Conference, TestCom 2006, New York, NY, USA, May 16-18, 2006, Proceedings
Springer 2006 |
| 2005 |
|---|
| 8 | | Ali Y. Duale,
Theodore J. Bohizic,
Dennis W. Wittig:
Pseudo-Random System Testing: Coverage Estimation and Enhancement.
Software Engineering Research and Practice 2005: 283-289 |
| 2004 |
|---|
| 7 | | Ali Y. Duale,
Theodore J. Bohizic,
Dennis W. Wittig:
Architectural Verification of Large Multiprocessor Computers.
PDPTA 2004: 502-507 |
| 6 | EE | Ali Y. Duale,
M. Ümit Uyar:
A Method Enabling Feasible Conformance Test Sequence Generation for EFSM Models.
IEEE Trans. Computers 53(5): 614-627 (2004) |
| 2003 |
|---|
| 5 | EE | Mariusz A. Fecko,
M. Ümit Uyar,
Ali Y. Duale:
Towards Testing SDL Specifications: Models and Fault Coverage for Concurrent Timers.
FORTE 2003: 273-288 |
| 4 | EE | Mariusz A. Fecko,
M. Ümit Uyar,
Ali Y. Duale,
Paul D. Amer:
A technique to generate feasible tests for communications systems with multiple timers.
IEEE/ACM Trans. Netw. 11(5): 796-809 (2003) |
| 3 | EE | M. Ümit Uyar,
Mariusz A. Fecko,
Ali Y. Duale,
Paul D. Amer,
Adarshpal S. Sethi:
Experience in developing and testing network protocol software using FDTs.
Information & Software Technology 45(12): 815-835 (2003) |
| 2000 |
|---|
| 2 | | Mariusz A. Fecko,
Paul D. Amer,
M. Ümit Uyar,
Ali Y. Duale:
Test Generation in the Presence of Conflicting Timers.
TestCom 2000: 301- |
| 1 | | Ali Y. Duale,
M. Ümit Uyar:
Generation of Feasible Test Sequences for EFSM Models.
TestCom 2000: 91- |
