Francisco J. O. Dias
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1976
2
Francisco J. O. Dias: Truth-Table Verification of an Iterative Logic Array.
IEEE Trans. Computers 25
(6): 605-613 (1976)
1975
1
Francisco J. O. Dias: Fault Masking in Combinational Logic Circuits.
IEEE Trans. Computers 24
(5): 476-482 (1975)
Copyright ©
Sun May 17 03:24:02 2009 by
Michael Ley
(
ley@uni-trier.de
)