| 2009 |
|---|
| 9 | EE | Süleyman Sirri Demirsoy,
Martin Langhammer:
Cholesky decomposition using fused datapath synthesis.
FPGA 2009: 241-244 |
| 2006 |
|---|
| 8 | EE | Ediz Çetin,
Süleyman Sirri Demirsoy,
Izzet Kale,
Richard C. S. Morling:
A Low-Complexity Self-Calibrating Adaptive Quadrature Receiver.
AHS 2006: 428-435 |
| 7 | EE | R. Kazazoglu,
Süleyman Sirri Demirsoy,
Izzet Kale,
Richard C. S. Morling:
A computationally efficient DAB bit-stream processor.
ISCAS 2006 |
| 2005 |
|---|
| 6 | EE | Süleyman Sirri Demirsoy,
Izzet Kale,
Andrew G. Dempster:
Synthesis of reconfigurable multiplier blocks: part I - fundamentals.
ISCAS (1) 2005: 536-539 |
| 5 | EE | Süleyman Sirri Demirsoy,
Izzet Kale,
Andrew G. Dempster:
Synthesis of reconfigurable multiplier blocks: part - II algorithm.
ISCAS (1) 2005: 540-543 |
| 2003 |
|---|
| 4 | EE | Süleyman Sirri Demirsoy,
Robert Beck,
Andrew G. Dempster,
Izzet Kale:
Reconfigurable implementation of recursive DCT kernels for reduced quantization noise.
ISCAS (4) 2003: 289-292 |
| 3 | EE | Süleyman Sirri Demirsoy,
Andrew G. Dempster,
Izzet Kale:
Design guidelines for reconfigurable multiplier blocks.
ISCAS (4) 2003: 293-296 |
| 2002 |
|---|
| 2 | EE | Süleyman Sirri Demirsoy,
Andrew G. Dempster,
Izzet Kale:
Power analysis of multiplier blocks.
ISCAS (1) 2002: 297-300 |
| 1 | EE | Andrew G. Dempster,
Süleyman Sirri Demirsoy,
Izzet Kale:
Designing multiplier blocks with low logic depth.
ISCAS (5) 2002: 773-776 |
