| |
| 1995 | ||
|---|---|---|
| 6 | EE | Hong Chich Chou, Chung-Ping Chung: An Optimal Instruction Scheduler for Superscalar Processor. IEEE Trans. Parallel Distrib. Syst. 6(3): 303-313 (1995) |
| 1994 | ||
| 5 | EE | Hong Chich Chou, Chung-Ping Chung: Optimal multiprocessor task scheduling using dominance and equivalence relations. Computers & OR 21(4): 463-475 (1994) |
| 1993 | ||
| 4 | Hong Chich Chou, Chung-Ping Chung: Modeling of Superscalar Instruction Scheduling and Analysis of a Heuristic Scheduling Algorithm. BIT 33(3): 354-371 (1993) | |
| 1992 | ||
| 3 | EE | Hong Chich Chou, Chung-Ping Chung: Upper Bound Analysis of Scheduling Arbitrary-Delay Instructions on Typed Pipelined Processors. International Journal of High Speed Computing 4(4): 301-312 (1992) |
| 2 | Hong Chich Chou, Chung-Ping Chung: A bound analysis of scheduling instructions on pipelined processors with a maximal delay of one cycle. Parallel Computing 18(4): 393-399 (1992) | |
| 1989 | ||
| 1 | EE | Chung-Ping Chung, Shyi-Chyi Jeng, Hong Chich Chou, Cheng Chen: Design of Dual-ALU CRISC and Its Concurrent Execution . J. Inf. Sci. Eng. 5(3): 251-274 (1989) |
| 1 | Cheng Chen | [1] |
| 2 | Chung-Ping Chung | [1] [2] [3] [4] [5] [6] |
| 3 | Shyi-Chyi Jeng | [1] |