2005 | ||
---|---|---|
2 | EE | Sheng Sun, Yi Han, Xinyu Guo, Kian Haur Chong, Larry McMurchie, Carl Sechen: 409ps 4.7 FO4 64b Adder Based on Output Prediction Logic in 0.18um CMOS. ISVLSI 2005: 52-58 |
2003 | ||
1 | EE | Su Kio, Kian Haur Chong, Carl Sechen: A low power delayed-clocks generation and distribution system. ISCAS (5) 2003: 445-448 |
1 | Xinyu Guo | [2] |
2 | Yi Han | [2] |
3 | Su Kio | [1] |
4 | Larry McMurchie | [2] |
5 | Carl Sechen | [1] [2] |
6 | Sheng Sun | [2] |