| |
| 1994 | ||
|---|---|---|
| 3 | Shuenn-Der Jean, Chi-Min Liu, Chih-Chi Chang, Zen Chen: A New Algorithm and its VLSI Architecture Design for Connected Component Labelling. ISCAS 1994: 565-568 | |
| 1990 | ||
| 2 | Zen Chen, Chih-Chi Chang, Tsorng-Lin Chia: On the Design of VLSI Architectures for Parallel Execution of DO Loops. J. Parallel Distrib. Comput. 8(4): 393-399 (1990) | |
| 1987 | ||
| 1 | Zen Chen, Chih-Chi Chang: Iteration-Level Parallel Execution of DO Loops with a Reduced Set of Dependence Relations. J. Parallel Distrib. Comput. 4(5): 488-504 (1987) | |
| 1 | Zen Chen | [1] [2] [3] |
| 2 | Tsorng-Lin Chia | [2] |
| 3 | Shuenn-Der Jean | [3] |
| 4 | Chi-Min Liu | [3] |