| |
| 2003 | ||
|---|---|---|
| 4 | EE | Arun Raghupathy, N. Chandrachoodan, K. J. Ray Liu: Algorithm and VLSI architecture for high performance adaptive video scaling. IEEE Transactions on Multimedia 5(4): 489-502 (2003) |
| 2001 | ||
| 3 | EE | N. Chandrachoodan, S. S. Bhattacharyya, K. J. Ray Liu: Adaptive negative cycle detection in dynamic graphs. ISCAS (5) 2001: 163-166 |
| 2 | EE | N. Chandrachoodan, S. S. Bhattacharyya, K. J. Ray Liu: The hierarchical timing pair model. ISCAS (5) 2001: 367-370 |
| 1999 | ||
| 1 | EE | Arun Raghupathy, P. Hsu, K. J. Ray Liu, N. Chandrachoodan: VLSI architecture and design for high performance adaptive video scaling. ISCAS (4) 1999: 406-409 |
| 1 | S. S. Bhattacharyya | [2] [3] |
| 2 | P. Hsu | [1] |
| 3 | K. J. Ray Liu | [1] [2] [3] [4] |
| 4 | Arun Raghupathy | [1] [4] |