| |
| 2008 | ||
|---|---|---|
| 2 | EE | Avik Chakraborty: Testability of AND-EXOR Based Iterative Logic Arrays CoRR abs/0805.1293: (2008) |
| 2005 | ||
| 1 | EE | Avik Chakraborty: Synthesis of Reversible Circuits for Testing with Universal Test Set and C-Testability of Reversible Iterative Logic Arrays. VLSI Design 2005: 249-254 |