S. Bierly
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1985
1
EE
M. Iachponi
,
D. Vail
, S. Bierly,
A. Ignatowski
: A hierarchical gate array architecture and design methodology.
DAC 1985
: 439-442
Coauthor
Index
1
M. Iachponi
[
1
]
2
A. Ignatowski
[
1
]
3
D. Vail
[
1
]
Copyright ©
Sun May 17 03:24:02 2009 by
Michael Ley
(
ley@uni-trier.de
)