Prakash Bhatia
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2001
1
EE
K. Joseph Hass
,
Jack Venbrux
, Prakash Bhatia: Logic Design Considerations for 0.5-Volt CMOS.
ARVLSI 2001
: 75-87
Coauthor
Index
1
K. Joseph Hass
[
1
]
2
Jack Venbrux
[
1
]
Copyright ©
Sun May 17 03:24:02 2009 by
Michael Ley
(
ley@uni-trier.de
)
