| 2004 |
| 10 | EE | Andrew J. Bennett,
A. J. Field:
Performance Engineering with the UML Profile for Schedulability, Performance and Time: A Case Study.
MASCOTS 2004: 67-75 |
| 9 | EE | Andrew J. Bennett,
A. J. Field,
C. Murray Woodside:
Experimental Evaluation of the UML Profile for Schedulability, Performance, and Time.
UML 2004: 143-157 |
| 2003 |
| 8 | EE | Andrew J. Bennett,
Michel L. F. Grech,
Musa R. Unmehopa,
Kumar V. Vemuri:
Service mediation standards.
Bell Labs Technical Journal 7(3): 77-90 (2003) |
| 7 | EE | Andrew J. Bennett,
Musa R. Unmehopa,
Kumar V. Vemuri:
The Parlay proxy manager - Architecture considerations.
Bell Labs Technical Journal 7(3): 91-104 (2003) |
| 2001 |
| 6 | | Andrew J. Bennett,
Paul H. J. Kelly,
Ross A. Paterson:
Pipelined functional tree accesses and updates: scheduling, synchronization, caching and coherence.
J. Funct. Program. 11(4): 359-393 (2001) |
| 1996 |
| 5 | | Sarah A. M. Talbot,
Andrew J. Bennett,
Paul H. J. Kelly:
Cautions, Machine-Independent Performance Tuning for Shared-Memory Multiprocessors.
Euro-Par, Vol. I 1996: 106-113 |
| 4 | | Andrew J. Bennett,
Paul H. J. Kelly,
Jacob G. Refstrup,
Sarah A. M. Talbot:
Using Proxies to Reduce Controller Contention in Large Shared-Memory Multiprocessors.
Euro-Par, Vol. II 1996: 445-452 |
| 3 | | Andrew J. Bennett,
A. J. Field,
Peter G. Harrison:
Modelling and Validation of Shared Memory Coherency Protocols.
Perform. Eval. 27/28(4): 541-563 (1996) |
| 1994 |
| 2 | | Andrew J. Bennett,
Paul H. J. Kelly:
Eliminating Invalidation in Coherent-Cache Parallel Graph Reduction.
PARLE 1994: 375-386 |
| 1993 |
| 1 | | Andrew J. Bennett,
Paul H. J. Kelly:
Localtiy and False Sharing in Coherent-Cache Parallel Graph Reduction.
PARLE 1993: 329-340 |