| 2008 |
| 46 | EE | Bin Chen,
George S. Avrunin,
Elizabeth A. Henneman,
Lori A. Clarke,
Leon J. Osterweil,
Philip L. Henneman:
Analyzing medical processes.
ICSE 2008: 623-632 |
| 45 | EE | Lori A. Clarke,
George S. Avrunin,
Leon J. Osterweil:
Using software engineering technology to improve the quality of medical processes.
ICSE Companion 2008: 889-898 |
| 44 | EE | Jamieson M. Cobleigh,
George S. Avrunin,
Lori A. Clarke:
Breaking up is hard to do: An evaluation of automated assume-guarantee reasoning.
ACM Trans. Softw. Eng. Methodol. 17(2): (2008) |
| 43 | EE | Stephen F. Siegel,
Anastasia Mironova,
George S. Avrunin,
Lori A. Clarke:
Combining symbolic execution with model checking to verify parallel numerical programs.
ACM Trans. Softw. Eng. Methodol. 17(2): (2008) |
| 2007 |
| 42 | EE | Stefan Christov,
Bin Chen,
George S. Avrunin,
Lori A. Clarke,
Leon J. Osterweil,
David Brown,
Lucinda Cassells,
Wilson Mertens:
Rigorously Defining and Analyzing Medical Processes: An Experience Report.
MoDELS Workshops 2007: 118-131 |
| 41 | EE | Stephen F. Siegel,
George S. Avrunin:
Verification of Halting Properties for MPI Programs Using Nonblocking Operations.
PVM/MPI 2007: 326-334 |
| 40 | EE | Leon J. Osterweil,
George S. Avrunin,
Bin Chen,
Lori A. Clarke,
Rachel L. Cobleigh,
Elizabeth A. Henneman,
Philip L. Henneman:
Engineering Medical Processes to Improve Their Safety.
Situational Method Engineering 2007: 267-282 |
| 39 | EE | Shangzhu Wang,
George S. Avrunin,
Lori A. Clarke:
Plug-and-Play Architectural Design and Verification.
WADS 2007: 273-297 |
| 2006 |
| 38 | EE | Shangzhu Wang,
George S. Avrunin,
Lori A. Clarke:
Architectural Building Blocks for Plug-and-Play System Design.
CBSE 2006: 98-113 |
| 37 | EE | Jianbin Tan,
George S. Avrunin,
Lori A. Clarke:
Managing space for finite-state verification.
ICSE 2006: 152-161 |
| 36 | EE | Stephen F. Siegel,
Anastasia Mironova,
George S. Avrunin,
Lori A. Clarke:
Using model checking with symbolic execution to verify parallel numerical programs.
ISSTA 2006: 157-168 |
| 35 | EE | Jamieson M. Cobleigh,
George S. Avrunin,
Lori A. Clarke:
Breaking up is hard to do: an investigation of decomposition for assume-guarantee reasoning.
ISSTA 2006: 97-108 |
| 34 | EE | Shangzhu Wang,
George S. Avrunin,
Lori A. Clarke:
Verification support for plug-and-play architectural design.
ROSATEA 2006: 49-50 |
| 33 | EE | Rachel L. Cobleigh,
George S. Avrunin,
Lori A. Clarke:
User guidance for creating precise and accessible property specifications.
SIGSOFT FSE 2006: 208-218 |
| 32 | EE | Bin Chen,
George S. Avrunin,
Lori A. Clarke,
Leon J. Osterweil:
Automatic Fault Tree Derivation from Little-JIL Process Definitions.
SPW/ProSim 2006: 150-158 |
| 2005 |
| 31 | EE | Lori A. Clarke,
Yao Chen,
George S. Avrunin,
Bin Chen,
Rachel L. Cobleigh,
Kim Frederick,
Elizabeth A. Henneman,
Leon J. Osterweil:
Process Programming to Support Medical Safety: A Case Study on Blood Transfusion.
ISPW 2005: 347-359 |
| 30 | EE | Stephen F. Siegel,
George S. Avrunin:
Modeling wildcard-free MPI programs for verification.
PPOPP 2005: 95-106 |
| 2004 |
| 29 | | George S. Avrunin,
Gregg Rothermel:
Proceedings of the ACM/SIGSOFT International Symposium on Software Testing and Analysis, ISSTA 2004, Boston, Massachusetts, USA, July 11-14, 2004
ACM 2004 |
| 28 | EE | Jianbin Tan,
George S. Avrunin,
Lori A. Clarke:
Heuristic-Based Model Refinement for FLAVERS.
ICSE 2004: 635-644 |
| 27 | EE | Jianbin Tan,
George S. Avrunin,
Lori A. Clarke,
Shlomo Zilberstein,
Stefan Leue:
Heuristic-guided counterexample search in FLAVERS.
SIGSOFT FSE 2004: 201-210 |
| 26 | EE | Stephen F. Siegel,
George S. Avrunin:
Verification of MPI-Based Software for Scientific Computation.
SPIN 2004: 286-303 |
| 2002 |
| 25 | EE | Rachel L. Smith,
George S. Avrunin,
Lori A. Clarke,
Leon J. Osterweil:
PROPEL: an approach supporting property elucidation.
ICSE 2002: 11-21 |
| 24 | EE | Stephen F. Siegel,
George S. Avrunin:
Improving the Precision of INCA by Eliminating Solutions with Spurious Cycles.
IEEE Trans. Software Eng. 28(2): 115-128 (2002) |
| 2000 |
| 23 | EE | Stephen F. Siegel,
George S. Avrunin:
Improving the precision of INCA by preventing spurious cycles.
ISSTA 2000: 191-200 |
| 22 | EE | George S. Avrunin,
James C. Corbett,
Matthew B. Dwyer:
Benchmarking Finite-State Verifiers.
STTT 2(4): 317-320 (2000) |
| 1999 |
| 21 | EE | Gleb Naumovich,
George S. Avrunin,
Lori A. Clarke:
An Efficient Algorithm for Computing MHP Information for Concurrent Java Programs.
ESEC / SIGSOFT FSE 1999: 338-354 |
| 20 | EE | Gleb Naumovich,
George S. Avrunin,
Lori A. Clarke:
Data Flow Analysis for Checking Properties of Concurrent Java Programs.
ICSE 1999: 399-410 |
| 19 | EE | Matthew B. Dwyer,
George S. Avrunin,
James C. Corbett:
Patterns in Property Specifications for Finite-State Verification.
ICSE 1999: 411-420 |
| 1998 |
| 18 | EE | Matthew B. Dwyer,
George S. Avrunin,
James C. Corbett:
Property specification patterns for finite-state verification.
FMSP 1998: 7-15 |
| 17 | EE | Gleb Naumovich,
George S. Avrunin:
A Conservative Data Flow Algorithm for Detecting All Pairs of Statement That May Happen in Parallel.
SIGSOFT FSE 1998: 24-34 |
| 16 | EE | George S. Avrunin,
James C. Corbett,
Laura K. Dillon:
Analyzing Partially-Implemented Real-Time Systems.
IEEE Trans. Software Eng. 24(8): 602-614 (1998) |
| 1997 |
| 15 | EE | Gleb Naumovich,
George S. Avrunin,
Lori A. Clarke,
Leon J. Osterweil:
Applying Static Analysis to Software Architectures.
ESEC / SIGSOFT FSE 1997: 77-93 |
| 14 | EE | George S. Avrunin,
James C. Corbett,
Laura K. Dillon:
Analyzing Partially-Implemented Real-Time Systems.
ICSE 1997: 228-238 |
| 1996 |
| 13 | | George S. Avrunin:
Symbolic Model Checking Using Algebraic Geometry.
CAV 1996: 26-37 |
| 1995 |
| 12 | | James C. Corbett,
George S. Avrunin:
Using Integer Programming to Verify General Safety and Liveness Properties.
Formal Methods in System Design 6(1): 97-123 (1995) |
| 1994 |
| 11 | EE | James C. Corbett,
George S. Avrunin:
Towards Scalable Compositional Analysis.
SIGSOFT FSE 1994: 53-61 |
| 10 | EE | George S. Avrunin,
James C. Corbett,
Laura K. Dillon,
Jack C. Wileden:
Automated Derivation of Time Bounds in Uniprocessor Concurrent Systems.
IEEE Trans. Software Eng. 20(9): 708-719 (1994) |
| 1993 |
| 9 | EE | James C. Corbett,
George S. Avrunin:
A Practical Technique for Bounding the Time Between Events in Concurrent Real-Time Systems.
ISSTA 1993: 110-116 |
| 1991 |
| 8 | | George S. Avrunin,
Ugo A. Buy,
James C. Corbett:
Integer Programming in the Analysis of Concurrent Systems.
CAV 1991: 92-102 |
| 7 | EE | George S. Avrunin,
Ugo A. Buy,
James C. Corbett,
Laura K. Dillon,
Jack C. Wileden:
Experiments with an Improved Constrained Expression Toolset.
Symposium on Testing, Analysis, and Verification 1991: 178-187 |
| 6 | EE | George S. Avrunin,
Ugo A. Buy,
James C. Corbett,
Laura K. Dillon,
Jack C. Wileden:
Automated Analysis of Concurrent Systems With the Constrained Expression Toolset.
IEEE Trans. Software Eng. 17(11): 1204-1222 (1991) |
| 1989 |
| 5 | EE | George S. Avrunin,
Jack C. Wileden,
Laura K. Dillon:
Experiments in Automated Analysis of Concurrent Software Systems.
Symposium on Testing, Analysis, and Verification 1989: 124-130 |
| 1988 |
| 4 | | Jack C. Wileden,
George S. Avrunin:
Towards Automating Analysis Support for Developers of Distributed Software.
ICDCS 1988: 350-357 |
| 3 | EE | Laura K. Dillon,
George S. Avrunin,
Jack C. Wileden:
Constrained Expressions: Toward Broad Applicability of Analysis Methods for Distributed Software Systems.
ACM Trans. Program. Lang. Syst. 10(3): 374-402 (1988) |
| 1986 |
| 2 | | George S. Avrunin,
Laura K. Dillon,
Jack C. Wileden,
William E. Riddle:
Constrained Expressions: Adding Analysis Capabilities to Design Methods for Concurrent Software Systems.
IEEE Trans. Software Eng. 12(2): 278-292 (1986) |
| 1985 |
| 1 | EE | George S. Avrunin,
Jack C. Wileden:
Describing and Analyzing Distributed Software System Designs.
ACM Trans. Program. Lang. Syst. 7(3): 380-403 (1985) |