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| 2005 | ||
|---|---|---|
| 1 | EE | Ajit Sharma, P. Birrer, S. K. Arunachalam, Chenggang Xu, Terri S. Fiez, Kartikeya Mayaram: Accurate Prediction of Substrate Parasitics in Heavily Doped CMOS Processes Using a Calibrated Boundary Element Solver. IEEE Trans. VLSI Syst. 13(7): 843-851 (2005) |
| 1 | P. Birrer | [1] |
| 2 | Terri S. Fiez | [1] |
| 3 | Kartikeya Mayaram | [1] |
| 4 | Ajit Sharma | [1] |
| 5 | Chenggang Xu | [1] |