I. S. Abu-Khater
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1995
1
EE
I. S. Abu-Khater,
A. Bellaouar
,
Mohamed I. Elmasry
,
Ran-Hong Yan
: Circuit/architecture for low-power high-performance 32-bit adder.
Great Lakes Symposium on VLSI 1995
: 74-
Coauthor
Index
1
A. Bellaouar
[
1
]
2
Mohamed I. Elmasry
[
1
]
3
Ran-Hong Yan
[
1
]
Copyright ©
Sun May 17 03:24:02 2009 by
Michael Ley
(
ley@uni-trier.de
)
