Digital Symposium Collection 2000  

 
 
 
 
 
 

 
















Mark D. Hill

DBMSs on a Modern Processor: Where Does Time Go?

Publications

Note: Links lead to the DBLP on the Web.

Mark D. Hill

40 E. Ender Bilir , Ross M. Dickson , Ying Hu , Manoj Plakal , Daniel J. Sorin , Mark D. Hill, David A. Wood : Multicast Snooping: A New Coherence Method Using a Multicast Address Network. ISCA 1999 : 294-304

39 Trishul M. Chilimbi , Mark D. Hill, James R. Larus : Cache-Conscious Structure Layout. PLDI 1999 : 1-12

38 Mark D. Hill, Anne Condon , Manoj Plakal , Daniel J. Sorin : A System-Level Specification Framework for I/O Architectures. SPAA 1999 : 138-147

37 Anastassia Ailamaki , David J. DeWitt , Mark D. Hill, David A. Wood : DBMSs on a Modern Processor: Where Does Time Go? VLDB 1999 : 266-277

36 Sarita V. Adve , Mark D. Hill: Weak Ordering - A New Definition. 25 Years ISCA: Retrospectives and Reprints 1998 : 363-375

35 Sarita V. Adve , Mark D. Hill: Retrospective: Weak Ordering - A New Definition. 25 Years ISCA: Retrospectives and Reprints 1998 : 63-66

34 Shubhendu S. Mukherjee , Mark D. Hill: Using Prediction to Accelerate Coherence Protocols. ISCA 1998 : 179-190

33 Manoj Plakal , Daniel J. Sorin , Anne Condon , Mark D. Hill: Lamport Clocks: Verifying a Directory Cache-Coherence Protocol. SPAA 1998 : 67-76

32 Shubhendu S. Mukherjee , Mark D. Hill: Making Network Interfaces Less Peripheral. IEEE Computer 31 (10): 70-76 (1998)

31 Andrew A. Chien , Mark D. Hill, Shubhendu S. Mukherjee : Design Challenges for High-Performance Network Interfaces - Guest Editors' Introduction. IEEE Computer 31 (11): 42-44 (1998)

30 Mark D. Hill: Multiprocessors Should Support Simple Memory-Consistency Models. IEEE Computer 31 (8): 28-34 (1998)

29 Yuanyuan Zhou , Liviu Iftode , Jaswinder Pal Singh , Kai Li , Brian R. Toonen , Ioannis Schoinas , Mark D. Hill, David A. Wood : Relaxed Consistency and Coherence Granularity in DSM Systems: A Performance Evaluation. PPOPP 1997 : 193-205

28 Shubhendu S. Mukherjee , Babak Falsafi , Mark D. Hill, David A. Wood : Coherent Network Interfaces for Fine-Grain Communication. ISCA 1996 : 247-258

27 Sashikanth Chandrasekaran , Mark D. Hill: Optimistic Simulation of Parallel Architectures Using Program Executables. Workshop on Parallel and Distributed Simulation 1996 : 143-150

26 Mark D. Hill, James R. Larus , David A. Wood : Tempest: A Substrate for Portable Parallel Programs. COMPCON 1995 : 327-332

25 Shubhendu S. Mukherjee , Shamik D. Sharma , Mark D. Hill, James R. Larus , Anne Rogers , Joel H. Saltz : Efficient Support for Irregular Applications on Distributed-Memory Machines. PPOPP 1995 : 68-79

24 Madhusudhan Talluri , Mark D. Hill, Yousef Y. A. Khalidi : A New Page Table for 64-bit Address Spaces. SOSP 1995 : 184-200

23 David A. Wood , Mark D. Hill: Cost-Effective Parallel Computing. IEEE Computer 28 (2): 69-72 (1995)

22 Ted G. Lewis , Dave Power , Bertrand Meyer , Jack Grimes , Mike Potel , Ronald J. Vetter , Phillip A. Laplante , Wolfgang Pree , Gustav Pomberger , Mark D. Hill, James R. Larus , David A. Wood , Hesham El-Rewini , Bruce W. Weide : Where I Software Headed? A Virtual Roundtable. IEEE Computer 28 (8): 20-32 (1995)

21 Madhusudhan Talluri , Mark D. Hill: Surpassing the TLB Performance of Superpages with Less Operating System Support. ASPLOS 1994 : 171-182

20 Richard E. Kessler , Mark D. Hill, David A. Wood : A Comparison of Trace-Sampling Techniques for Multi-Megabyte Caches. IEEE Transactions on Computers 43 (6): 664-675 (1994)

19 David A. Wood , Satish Chandra , Babak Falsafi , Mark D. Hill, James R. Larus , Alvin R. Lebeck , James C. Lewis , Shubhendu S. Mukherjee , Subbarao Palacharla , Steven K. Reinhardt : Mechanisms for Cooperative Shared Memory. ISCA 1993 : 156-167

18 Steven K. Reinhardt , Mark D. Hill, James R. Larus , Alvin R. Lebeck , James C. Lewis , David A. Wood : The Wisconsin Wind Tunnel: Virtual Prototyping of Parallel Computers. SIGMETRICS 1993 : 48-60

17 Andreas Farid Pour , Mark D. Hill: Performance Implications of Tolerating Cache Faults. IEEE Transactions on Computers 42 (3): 257-267 (1993)

16 Mark D. Hill, James R. Larus , Steven K. Renhardt , David A. Wood : Cooperative Shared Memory: Software and Hardware Support for Scalable Multiprocesors. TOCS 11 (4): 300-318 (1993)

15 Mark D. Hill, James R. Larus , Steven K. Renhardt , David A. Wood : Cooperative Shared Memory: Software and Hardware Support for Scalable Multiprocesors. ASPLOS 1992 : 262-273

14 Madhusudhan Talluri , Shing I. Kong , Mark D. Hill, David A. Patterson : Tradeoffs in Supporting Two Page Sizes. ISCA 1992 : 415-424

13 Richard E. Kessler , Mark D. Hill: Page Placement Algorithms for Large Real-Indexed Caches. TOCS 10 (4): 338-359 (1992)

12 Sarita V. Adve , Mark D. Hill, Barton P. Miller , Robert H. B. Netzer : Detecting Data Races on Weak Memory Systems. ISCA 1991 : 234-243

11 Sarita V. Adve , Vikram S. Adve , Mark D. Hill, Mary K. Vernon : Comparison of Hardware and Software Cache Coherence Schemes. ISCA 1991 : 298-308

10 Yul H. Kim , Mark D. Hill, David A. Wood : Implementing Stack Simulation for Highly-Associative Memories. SIGMETRICS 1991 : 212-213

9 David A. Wood , Mark D. Hill, Richard E. Kessler : A Model for Estimating Trace-Sample Miss Ratios. SIGMETRICS 1991 : 79-89

8 Sarita V. Adve , Mark D. Hill: Weak Ordering - A New Definition. ISCA 1990 : 2-14

7 Mark D. Hill, James R. Larus : Cache Considerations for Multiprocessor Programmers. CACM 33 (8): 97-102 (1990)

6 Richard E. Kessler , Richard Jooss , Alvin R. Lebeck , Mark D. Hill: Inexpensive Implementations of Set-Associativity. ISCA 1989 : 131-139

5 Mark D. Hill, Alan Jay Smith : Evaluating Associativity in CPU Caches. IEEE Transactions on Computers 38 (12): 1612-1630 (1989)

4 Mark D. Hill: A Case for Direct-Mapped Caches. IEEE Computer 21 (12): 25-40 (1988)

3 David A. Wood , Susan J. Eggers , Garth A. Gibson , Mark D. Hill, Joan M. Pendleton , Scott A. Ritchie , George S. Taylor , Randy H. Katz , David A. Patterson : An In-Cache Address Translation Mechanism. ISCA 1986 : 358-365

2 Mark D. Hill, Alan Jay Smith : Experimental Evaluation of On-Chip Microprocessor Cache Memories. ISCA 1984 : 158-166

1 David A. Patterson , Phil Garrison , Mark D. Hill, Dimitris Lioupis , Chris Nyberg , Tim Sippel , Korbin Van Dyke : Architecture of a VLSI Instruction Cache for a RISC. ISCA 1983 : 108-116



























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